This application claims the priority of Korean Patent Application No. 10-2005-16607, filed on 28 Feb. 2005, in the Korean Intellectual Property Office.
1. Field of the Invention
The present invention relates to a data transmission method and a system for performing the data transmission method, and more particularly, to a serial data transmission method and a serializer for performing the serial data transmission method.
2. Description of the Related Art
With the development of electronic and computer technologies, communication between different devices is increasingly important. High-speed communication is needed between different chips on a circuit board, circuit boards in a system, and different systems. An important problem in the communication between devices is the simplification of transmission lines used as data flow lines between the devices. To simplify transmission lines and enhance reliability of communication signals, sending devices convert parallel data signals into serial data signals and then transmit the serial signals, and receiving devices convert the serial data signals into parallel data signals for further processing.
A device for converting parallel data signals into serial data signals is called a serializer, and a device for converting serial data signals into parallel data signals is called a parallelizer.
FIG. 1 is a schematic block diagram illustrating a method for communicating data between communication terminals. In FIG. 1, a first communication terminal 10 and a second communication terminal 20 are devices for parallel data processing. A serializer 30 and a parallelizer 40 are provided between the first communication terminal 10 and the second communication terminal 20.
Referring to FIG. 1, the first communication terminal 10 transmits, in parallel, a sync signal Sync1, data clock signal CLK1, and n data signals DATA1 through corresponding bus lines. The sync signal Sync1 and the data clock signal CLK1 are used to synchronize transmission times and reception times of data transmitted to the serializer 30. To transmit the n data signals DATA1 from the first communication terminal 10 to the serializer 30, n data bus lines are needed. Here, “n” is the number of data signals that are to be simultaneously transmitted from the first communication terminal 10 to the serializer 30. The serializer 30 receives the parallel data signals and converts them into serial data signals. When the data signals, transmitted from the first communication terminal 10 through n data bus lines to the serializer 30, are transmitted through a single data bus line, a serial clock signal S-CLK is needed. The serial clock signal S-CLK is generated by a phase locked loop (PLL) 31 of the serializer 30. The PLL 31 receives the clock signal CLK1 from the first communication terminal 10 and outputs the serial clock signal S-CLK. If a frequency representing the number of data bits transmitted per hour of the clock signal CLK1 is assumed to be f1, the serial clock signal S-CLK must have n times the frequency of f1. To transmit n data bits over a serial data signal S-DATA, the frequency of the serial clock signal S-CLK representing the number of data bits transmitted per hour must be n times the frequency of the clock signal CLK1.
The serial data signal S-DATA and the serial clock signal S-CLK are inputted to the parallelizer 40. The parallelizer 40 converts the serial data signal S-DATA into parallel data signals suitable for the second communication terminal 20 according to the clock signal S-CLK. Using the serial clock signal S-CLK, the parallelizer 40 generates a clock signal CLK2, a frequency of which is equal to the frequency (f1) of the clock signal CLK1 outputted from the first communication terminal 10. The parallelizer 40 recovers the n data signals DATA2 based on the clock signal CLK2, and transmits in parallel the data signals DATA2 to the second communication terminal 20.
In the method for communicating data between communication terminals, the serial clock signal S-CLK for the serial data communication is generated using the clock signal CLK1 outputted from the first communication terminal 10. If the first communication terminal 10 temporarily stops its operation, for example, so as to reduce power consumption of the system, the generation of the clock signal CLK1 is also stopped temporarily and thus a stable serial clock signal S-CLK cannot be obtained. In addition, after generation of the clock signal CLK1 is resumed from the first communication terminal 10, serial data transmission is delayed by a stabilization time so as to obtain a stable serial clock signal S-CLK.
Therefore, a need exists for a serial data transmission method and a serializer therefore using an independent clock.